FIG. 1 illustrates a conventional disk drive 100. The disk drive 100 performs data storage and retrieval functions for an external host computer 102. The disk drive 100 includes a disk 104, a transducer 106, an actuator assembly 108, a voice coil motor (VCM) 110, a read/write channel 112, an encoder/decoder (ENDEC) 114, an error correction code (ECC) unit 116, a data buffer 118, an interface 120, a servo unit 122 and a disk controller 124.
The disk 104 includes one or two disk surfaces (not shown) which are coated with magnetic material capable of changing its magnetic orientation in response to an applied magnetic field. Data is stored digitally in magnetic-polarity transitions (frequently referred to as pulses in cells) within concentric tracks on the disk surface(s). The disk 104 is rotated at a substantially constant spin rate by a spin motor (not shown) that is speed-controlled by a closed-loop feedback system. Instead of the single disk 104, the disk drive 100 can include multiple disks 104 each mounted on a single spindle and serviced by one or more separate transducers 106.
The transducer 106 transfers information to and from the disk 104 during read and write operations. The transducer 106 is positioned over the disk 104 by the actuator assembly 108 that pivots about an axis under the power of the VCM 110. During a write operation, a polarity-switchable write current is delivered to the transducer 106 from the channel 112 to induce magnetic-polarity transitions onto a desired track of the disk 104. During a read operation, the transducer 106 senses magnetic-polarity transitions on a desired track of the disk 104 to create an analog read signal that is indicative of the data stored thereon. The transducer 106 is commonly a dual element head having a magneto-resistive read element and an inductive write element.
The VCM 110 receives movement commands from the servo unit 122 for properly positioning the transducer 106 above a desired track of the disk 104 during read and write operations. The servo unit 122 is part of a servo loop that uses servo information from the disk 104 to control the movement of the transducer 106 and the actuator assembly 108 in response to commands from the disk controller 124.
During a read operation, the channel 112 receives the read signal from the transducer 106 and processes the read signal to create digital data representative of the data stored on the disk 104. The channel 112 includes detection circuitry and a read clock for deriving timing information from the read signal.
The ENDEC 114 encodes data transferred from the host computer 102 to the disk 104, and decodes data transferred from the disk 104 to the host computer 102. Data written to the disk 104 is encoded for a number of reasons, including timing and detection. The ENDEC 114 imparts a run length limited (RLL) code on data written to the disk 104 to ensure that the transition frequency in the bit stream does not exceed or fall below predetermined limits. RLL coding ensures that enough transitions exist in the read data to maintain an accurate read clock.
The ECC unit 116 adds redundant information to user data from the host computer 102 before the data is encoded by the ENDEC 114 and written to the disk 104. The redundant information is used during subsequent read operations to discover error locations and values in the decoded read data. Read data errors can result from (1) noise from disk defects, (2) random noise from the transducer, cabling and electronics, (3) poor transducer placement reducing signal amplitude and/or increasing adjacent track noise during the read operation, (4) poorly written data due to disk defects or poor transducer placement, (5) foreign matter on the disk, and (6) disk damage. The ECC unit 16 corrects up to a predetermined number of errors in a data block (sector). If more than the predetermined number of errors exist, then the ECC unit 16 will not correct the errors but may still identify that errors exist within the data block. The ECC functionality is implemented by hardware and software.
The data buffer 118 temporarily stores data (1) to permit different data rates between the disk drive 100 and the interface bus between the disk drive 100 and the host computer 102, (2) to allow the ECC unit 116 to correct data errors before the data is sent to the host computer 102, (3) for temporary parameter storage for the disk controller 124, and (4) for data caching.
The interface 120 establishes and maintains communication between the disk drive 100 and the host computer 102. The transfer of information into and out of the disk drive 100 takes place through the interface 120.
The disk controller 124 is a microprocessor that controls the operation and timing of other components in the disk drive 100. In addition, the disk controller 124 may perform the functions of some of these components. For example, the disk controller 124 may perform the correction computation of the ECC unit 116 if the errors exceed the capability of the ECC unit 116.
Disk drive encoding and decoding schemes have drawbacks. Clock information is embedded in data stored on the disk 104, and detected data includes clock phase error information that the channel 112 uses for clock extraction. RLL codes ensure adequate and timely clock information for clock extraction.
RLL codes are d,k codes, where d is the minimum run length between magnetic-polarity transitions and k is the maximum run length between magnetic-polarity transitions. The d,k codes are also the minimum and maximum number of 0's between two 1's, respectively. Data representation conventions include NRZ (non-return to zero) and NRZI (non-return to zero, change on ones). With NRZ, a magnetic-polarity transition occurs when a sequence (one or more) of 0's changes to a sequence of 1's, or vice-versa. With NRZI, d,k becomes (d+1,k+1), a magnetic-polarity transition occurs each time a 1 appears and 0's appear otherwise. While either convention is acceptable and supported by the present invention, NRZ will be illustrated below. Under either convention, d is the minimum number of bits that must exist between magnetic-polarity transitions, and k is the maximum number bits that may exist between magnetic-polarity transitions. The constraint d controls pulse crowding effects, and the constraint k ensures clock extraction and to facilitate error event length control in certain sequence detectors. Viterbi detectors and the like usually permit the minimum run length constraint d to be 0.
ENDEC 114 implements RLL code by logically complete, immutable and unambiguous mapping between uncoded symbols (data symbols and ECC symbols) and encoded symbols (to be stored on the disk) to ensure that the encoded symbols meet the run length constraints. The encoded symbols include more bits than the uncoded symbols because symbols (words) that do not satisfy the run length constraints are discarded.
The number of bits in the uncoded symbol is M, and the number of bits in the encoded symbol is N. The code rate M/N is less than one in conventional systems. Encoders exhibiting code rates of 8/9, 16/17 and 24/25 are typical for disk drives.
With a code rate of 8/9, one of 28=256 possible uncoded symbols may be mapped to one of 29=512 possible encoded symbols. However, of the 512 possible encoded symbols, those symbols that fail to meet the run length constraints (and other excess symbols) are discarded, and only 256 of the 512 possible encoded symbols are used.
Because encoding requires uncoded symbols with M bits to be mapped to encoded symbols with N bits, overhead is added to the disk drive 100. For example, with an 8/9 code rate, 1/9th of the user data space on the disk 104 is occupied by unproductive overhead. Similarly, for a 24/25 code rate, 1/25th of the user data space on the disk 104 is occupied by unproductive overhead. To minimize RLL code overhead, encoders have been designed with higher code rates which implies larger M and N values so that the code rate asymptotically approaches, but never reaches, the value 1 (zero code overhead).
However, increasing M and N to achieve higher code rates also increases decoder error propagation that degrades ECC performance. When errors occur in detecting the encoded symbols, errors increase from mapping the encoded symbols to uncoded symbols because any one encoded error bit may map to one or more decoded error bits, and thus to multiple uncoded symbols recognized by the ECC unit 116. There is a strong correlation between error propagation and the size of M and N. The larger M and N are, the greater the average error propagation seen by the ECC unit 116.
More ECC symbols compensate for increased error propagation. However, more ECC symbols create more ECC overhead, thereby lowering the ECC code rate defined as data symbols/(data symbols+ECC symbols). Decreasing the ECC code rate also degrades the combined code rate defined as RLL code rate×ECC code rate. Thus, increasing M and N eventually decreases the combined code rate.
Further, if M is not an exact multiple of the ECC symbol size, or if the ECC symbols and the uncoded symbols do not share the same boundaries whenever possible, then additional error propagation occurs because certain uncoded symbol errors may affect more symbols than necessary due to poor mapping.
Large M and N also degrade format efficiency due to inflexible sector sizes. Format efficiency is greatest when the sum of data bytes, CRC bytes, and ECC bytes is an exact multiple of M. However, as M becomes larger, format efficiency suffers which creates problems similar to increased code overhead.
Concatenated recording codes provide both run length constraints and redundancy information (parity codes, turbo codes, etc.). The redundancy information permits signal extraction at reasonable error rates despite poor signal-to-noise ratios. However, the run length constraints may limit the redundancy information.
Accordingly, there is a need for improved encoding and decoding of data to be recorded in a data storage device.